cache

(redirected from static RAM)
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Related to static RAM: dynamic RAM

cache

 [kash]
a memory mechanism used by a computer to accelerate access to information.

cache

A storage area on a PC’s hard drive where the browser temporarily stores web pages and/or graphic elements.
References in periodicals archive ?
Features include embedded 10/100 Mbps Ethernet PHY and MAC, compliant with the IEEE 802.3 specification; dedicated, deeply embedded digital signal processor (DSP) functionality to facilitate rapid operation of the PHY transceiver; 64 Kb of third-generation flash; a high-performance 25 MHz HCS12 core; a 10-bit, eight-channel analog-to-digital converter; a clock generation module with a phase locked loop; a four-channel 16-bit timer; two serial communication interfaces (SCIs) and a serial peripheral interface running at speeds up to 6.25 Mbps and an inter IC bus; and 8 Kb of static RAM. Freescale Semiconductor
The ARM/Ericsson chipset consists of a baseband unit which incorporates the EBC and ARM cores along with a slew of memory and bus controllers and embedded static RAM (SRAM).
Fujitsu's new MB84VN23381EJ and MB84VN23391EJ MCP devices provide 64Mbit NAND-type Flash memory and 16Mbit FCRAM with a static RAM interface.
Nintendo Co will use a radical embedded static RAM (SRAM) design intended to improve graphics performance in its new 'Dolphin' games console.
It features a new electronics architecture that integrates the disk controller, static RAM memory and a new, faster microprocessor onto a single chip, providing improved reliability and increased data transfer rates.
Features include: embedded 10/100 Mbps Ethernet PHY and MAC, compliant with the IEEE 802.3 specification; dedicated, deeply embedded DSP functionality to facilitate rapid operation of the PHY transceiver; 64 Kb of third-generation flash; a high-performance 25 MHz HCS12 core; a 10-bit, eight-channel ADC; a clock generation module with PLL; a four-channel 16-bit timer; two serial communication interfaces and a serial peripheral interface running at speeds up to 6.25 Mbps and an inter IC bus; and 8 Kb static RAM. Freescale Semiconductor
The new flash and FCRAM-stacked MCPs utilize the company's "FlexBank" architecture, including 64 Mbit dual-operation flash memory and 16 Mbit FCRAM with an asynchronous Static RAM (SRAM) interface.