We make a standard JVM extensible by enabling execution of macro instructions. A macro is essentially defined by two values: the instruction code and the body.
These macro instruction definitions consist of bytecode instructions, and replace common instruction sequences in the code.
The recognition by the hardware of a trap or interrupt causes entry to a macro instruction sequence, INTRAP, which is noninterruptible mode performs a context switch to supervisor mode, stores the PC, PSW, and SSW on the supervisor stack, and transfers control to the trap or interrupt handler through the vector table.
As can be seen from those figures, the processor is divided into six major sections: the instruction bus interface (including an instruction prefetch buffer), the macro instruction unit, the instruction control unit, the floating point unit, the integer execution unit, and the data bus interface.