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high-density lipoprotein.


Abbreviation for high density lipoprotein. See: lipoprotein.


A lipoprotein with a relatively high concentration of protein and low concentration of lipids that incorporates cholesterol and transports it to the liver. High levels are associated with a decreased risk of atherosclerosis and coronary artery disease. Also called HDL cholesterol.


Abbreviation for high-density lipoprotein.


Abbrev. for high density LIPOPROTEINS.

High-density lipoprotein (HDL)

A type of lipoprotein that protects against coronary artery disease by removing cholesterol deposits from arteries or preventing their formation.

Patient discussion about HDL

Q. what are the sources for high density lipoprotein? I have heard that high density lipoprotein is good for heart. What differences does it make in heart’s health and what are the sources for high density lipoprotein?

A. Hi Liam, it is very important that we have high density lipoprotein (HDL) in our body. The fact is that the HDL is formed inside the body. They are known as good cholesterol as they are famous for their protection for heart against the heart diseases. It has been found that Vitamin B3 or Niacin consumption increases the count of HDL. It’s good to cut on the diet having more of saturated fats and oils, which increases the chances of heart attack.

Q. How can I increase my HDL cholesterol levels? My Doctor told me that my cholesterol levels are not good and that I should lower my LDL and higher my HDL. I understand how to lower the cholesterol, but how can I increase the HDL?

A. a good way is to eat boiled fish, and instead of regular oil, add olive oil to your salad.

Q. Improving High Triglycerides I take Tricor for high triglyceride levels; I have a healthy level of total cholesterol, with low LDL, very good HDL. I am now being treated for hypothyroidism, but my doctor says that it's also genetic (I had almost the exact same level number as my brother). How can I work to get my triglycerides under control?

A. High level of triglycerides are generally both genetic and diet related. If you are consuming a high fat containing diet then your level of triglycerides will be increased. On the other hand, regardless of your good cholesterol levels, if you start lowering the amount of fat in your food (less oil, less sweets, less red meat) and combine it with physical activity you can lower your triglycerides level, especially if you are already on medications.

More discussions about HDL
References in periodicals archive ?
The proposed VHDL library is composed of three packages: PAECore, PAEGates and Nbits, as in PElib [14].
In the related works mentioned so far, PSL or SVA expressions are translated into synthesizable VHDL or Verilog modules, but integrating assertion checkers in higher levels of abstraction is not addressed.
At this point the steps of the calculation of the multiplication in finite fields were studied to describe them concurrently in VHDL language in order to obtain the model for the hardware implementation of the multiplier.
VHDL - VHSIC (Very High Speed Integrated Circuit) Hardware Description Language
This technique is used to implement 10 bits of division in VHDL. As shown in test bench waveform of VHDL model in Fig.
El estudio detallado de la arquitectura del multiplicador [22], originalmente implementado a traves de registros para obtener los m vectores, a traves de corrimiento de los bits, es el fundamento para el analisis del comportamiento del circuito en m ciclos de reloj, donde m es igual al numero de bits de la palabra, esto permite la obtencion del modelo matematico generico para definir el comportamiento del multiplicador sobre campo finito [23], para su descripcion en VHDL. Con base a este modelo se logra una version paralelizada del multiplicador, para la cual se han eliminado los componentes secuenciales y estos han sido remplazados por la operacion de concatenacion que permite una version concurrente del circuito.
However, the nature of C programs running on an ARM platform is asynchronous sequential execution, while the nature of VHDL programs running on an FPGA platform is synchronous concurrent execution.
So, an interface module is written in VHDL for the serial communication.
10 which is simulated using VHDL modeling and implemented on the prototype development hardware shown in Fig.
The conversion into VHDL from another language will be a compromise between compilation time, space optimization, or clock cycle optimization.
FPGA Based Digital and Embedded System Design using VHDL, by Farida Memon, MUET.