machine language

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Related to Instruction cycle: execution cycle, fetch cycle, instruction format, machine cycle

machine language

A set of instructions written in symbols and graphic representations in a logical language understood by computers; it is flexible but error-prone, requiring advanced skill to write computer progams in it.
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The PIC16C925 and PIC16C926 are available in 64-pin TQFP and 68-pin PLCC packages and offer higher clock speeds of 20 MHz and 200 ns instruction cycle, 176 to 336 bytes of RAM and either 4k x 14 words or 8k x 14 words.
This innovative SiGe / CMOS approach thus enables Device Under Test (DUT)-cycle programming, where test waveforms are based on DUT timing needs and not constrained by a tester's instruction cycle rate.
Specifications: Part Number TC9486F/XB series Package QFP100/FBGA144 Instruction Cycle 10ns (100 MIPS operation) Operating Clock PLL incorporated for DSP clock Processor 24bit x 24 bit + 51bit multiplier and adder, 51bit ALU Data Bus 24bit x 3 Data RAM 20k word Coefficient ROM 32k word Program ROM 24k word Program RAM 512 word Audio Interface 4 output ports, 2 input ports (2 ports of LRCK and BCK), independent SPDIF (IEC958) input/output MCU Interface Serial or I2C bus interface Operating Voltage 2.
Synchronization modes operate at the clock edge, clock cycle, bus cycle, instruction cycle, function level and program level as well as fully asynchronous operation.
Intended for use in a wide range of USB devices, the C161U moves data within peripherals at up to 10 times the rate of most competitive chips, thanks to its combination of superior speed, bandwidth, instruction cycle time and DMA (direct memory access).
instructions in a single instruction cycle provides a performance
Main Specifications Part Number TC9446F series Package QFP100 Instruction Cycle 15.